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Team

Naveed Sherwani

Naveed Sherwani

Chairman

A well-known semiconductor industry veteran with over 35 years of entrepreneurial, engineering, and management experience. He is widely recognized as an innovator and leader in the field of design automation of ASICs and microprocessors having led over 300 tapeouts. He is main driver of the strategic evangelization of RISC-V International.

Pierre-Emmanuel Gaillardon

Pierre-Emmanuel Gaillardon

CEO

15 years of innovation in the field of FPGA, EDA. Associate Professor and at The University of Utah and Principal Investigator of OpenFPGA. Recipients of prestigious NSP CAREER award, DARPA Young Faculty Award, IEEE CEDA Ernest Kuh award and ACM SIGDA ONFA award. Author of 230+ peer-reviewed publications in AI and EDA.

Valerio Tenace

Valerio Tenace

CTO

PhD. in Information and Systems Engineering. Since 2016, author of more than 20 research articles and 4 patents mainly in the area of artificial intelligence techniques for hardware design. Creator and active maintainer of RapidGPT.

Pierre-Emmanuel Gaillardon

Hans Bouwmeester

VP of Sales and Operations

Passionate about bridging engineering and sales, Hans is a hands-on hardware and software innovator with a background in ASIC design, Semiconductor IP, Microprocessor design and ML/AI. While mostly focusing on sales and engineering management in the workplace, he likes to channel any spare time towards the architecture and development of LLM-based robotic process automation (RPA) applications as well.